Field Plate Devices for RF Power Applications

The aim of this chapter is to provide to the reader insights into field plate operation and itsgeometrical optimization. After giving some basic definitions concerning the operation of anRF-power device, which will be used in order to quantify the performance of the devicesstudied, the optimization of a gate-connected single field-plate GaAs-based pHEMT will bepresented. Field plate geometrical parameters will be varied in order to show how they canaffect device properties such as breakdown voltage, maximum output power and smallsignal performances. It will be thus possible to quantify the maximum improvement thatcan be achieved by using a gate connected single field plate. Finally, some advanced fieldplate structure will be discussed and compared in order to point out their advantages withrespect to the gate connected single field plate structure

Double-channel hemt device and manufacturing method thereof

An HEMT device (1), comprising: a semiconductor body (15) including a heterojunction structure (13); a dielectric layer (7) on the semiconductor body; a gate electrode (8); a drain electrode (12), facing a first side (8') of the gate electrode (8); and a source electrode (10), facing a second side (8") opposite to the first side (8') of the gate electrode; an auxiliary channel layer (20), which extends over the heterojunction structure (13) between the gate electrode (8) and the drain electrode (12), in electrical contact with the drain electrode (12) and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode

Double-channel hemt device and manufacturing method thereof

An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode

Double-channel hemt device and manufacturing method thereof

An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode

Hemt transistor including field plate regions and manufacturing process thereof

HEMT transistor (50; 100; 150) having a semiconductor body (52) forming a semiconductive heterostructure (54, 56); a gate region (60), of conductive material, arranged above and in contact with the semiconductor body (52); a first insulating layer (58) extending above the semiconductor body, laterally to the conductive gate region (60); a second insulating layer (62) extending above the first insulating layer (58) and the gate region (60); a first field plate region (84), of conductive material, extending between the first and the second insulating layers (58), laterally spaced from the conductive gate region (60); and a second field plate region (85), of conductive material, extending above the second insulating layer (62), vertically aligned with the first field plate region (84)

High electron mobility transistor and manufacturing method thereof

HEMT (1; 21; 31; 51) including a buffer layer (4), a hole-supply layer (6) on the buffer layer (4), a heterostructure (7) on the hole-supply layer (6), and a source electrode (16). The hole-supply layer (6) is made of P-type doped semiconductor material, the buffer layer (4) is doped with carbon, and the source electrode (16) is in direct electrical contact with the hole-supply layer (6), such that the hole-supply layer (6) can be biased to facilitate the transport of holes from the hole-supply layer (6) to the buffer layer (4)

Double-channel HEMT device and manufacturing method thereof

An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode